Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Balázs Vinarz, Angel Pons, Denis 'GNUtoo' Carikli,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46527
to look at the new patch set (#3).
Change subject: mb/asus/f2a85-m_pro: Enable PCIe bridge 00:15.2 in AGESA ......................................................................
mb/asus/f2a85-m_pro: Enable PCIe bridge 00:15.2 in AGESA
Currently, the PCIe bridge 00:15.2 is not detected by coreboot, causing the connected network device also to be missing.
With the vendor firmware 6601, `lspci -t` outputs:
-[0000:00]-+-00.0 +-00.2 +-01.0 +-01.1 +-10.0 +-10.1 +-11.0 +-12.0 +-12.2 +-13.0 +-13.2 +-14.0 +-14.2 +-14.3 +-14.4-[01]-- +-15.0-[02]-- +-15.1-[03]----00.0 +-15.2-[04]----00.0 +-18.0 +-18.1 +-18.2 +-18.3 +-18.4 -18.5
-[0000:00]-+-00.0 +-00.2 +-01.0 +-01.1 +-10.0 +-10.1 +-11.0 +-12.0 +-12.2 +-13.0 +-13.2 +-14.0 +-14.2 +-14.3 +-14.4-[01]-- +-14.5 +-15.0-[02]-- +-15.1-[03]----00.0 +-18.0 +-18.1 +-18.2 +-18.3 +-18.4 -18.5
The AMD Fusion Controller Hub (FCH) has four PCIe General Purpose Ports (GPP), which can be exposed as one to four PCIe devices.
Configure AGESA to expose the currently missing third GPP port to expose the PCIe bridge to coreboot.
When coreboot enables the PCIe bridge resources the serial console stops working, and it later it hangs in SeaBIOS. As the serial console is not working, it’s unclear where, but the SeaBIOS banner is printed on the screen, but not the message to press ESC. With GRUB as payload nothing is seen.
With `CONFIG_HUDSON_LEGACY_FREE is not set`:
[…] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 352 ms
APIC 00: ** Enter AmdInitMid [00020005] AmdInitMid() returned AGESA_SUCCESS APIC 00: Heap in SystemMem (4) at 0x10000014 APIC 00: ** Exit AmdInitMid [00020005] Warning: Can't write PCI_INTR 0xC00/0xC01 registers because 'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist BS: BS_DEV_ENABLE entry times (exec / console): 5 / 17 ms Enabling resources... PCI: 00:00.0 subsystem <- 1022/1410 PCI: 00:00.0 cmd <- 06 PCI: 00:00.2 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:01.1 cmd <- 02 PCI: 00:10.0 subsystem <- 1022/1410 PCI: 00:10.0 cmd <- 02 PCI: 00:10.1 subsystem <- 1022/1410 PCI: 00:10.1 cmd <- 02 PCI: 00:11.0 cmd <- 02 PCI: 00:12.0 subsystem <- 1022/1410 PCI: 00:12.0 cmd <- 02 PCI: 00:12.2 subsystem <- 1022/1410 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 subsystem <- 1022/1410 PCI: 00:13.0 cmd <- 02 PCI: 00:13.2 subsystem <- 1022/1410 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1022/1410 PCI: 00:14.0 cmd <- 403 PCI: 00:14.2 subsystem <- 1022/1410 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 1022/1410 PCI: 00:14.3 cmd <- 0f hudson lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff hudson lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 hudson lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 hudson lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291 hudson lpc decode:PNP: 002e.b, base=0x00001428, end=0x00001429 PCI: 00:14.4 bridge ctrl <- 0013 PCI: 00:14.4 cmd <- 00 PCI: 00:14.5 cmd <- 02 PCI: 00:15.0 bridge ctrl <- 0013 PCI: 00:15.0 cmd <- 00 PCI: 00:15.1 bridge ctrl <- 0013 PCI: 00:15.1 cmd <- 06 PCI: 00:15.2 bridge ctrl <- 0013 PCI: 00:15.2 cmd <- 07
Disabling the device 0.15.2, the serial console keeps working and the payloads work too. The Linux kernel (5.9.1 and 5.10-rc2) sets up the bridge and configures the network device.
+-15.2-[04]----00.0
From coreboot log:
[…] PCI: 00:14.5 [1022/7809] enabled hudson_enable() hudson_enable() PCI: 00:15.0 [1022/43a0] enabled hudson_enable() PCI: 00:15.1 [1022/43a1] enabled hudson_enable() PCI: 00:15.2 [1022/43a2] disabled PCI: 00:18.0 [1022/1400] enabled […]
Linux (`CONFIG_PCI_DIRECT=y`):
[…] [ 3.644703] pci 0000:00:14.0: [1022:780b] type 00 class 0x0c0500 [ 3.650744] pci 0000:00:14.2: [1022:780d] type 00 class 0x040300 [ 3.656643] pci 0000:00:14.2: reg 0x10: [mem 0xf01c4000-0xf01c7fff 64bit] [ 3.663678] pci 0000:00:14.2: PME# supported from D0 D3hot D3cold [ 3.669627] pci 0000:00:14.2: pme_poll = true [ 3.674627] pci 0000:00:14.2: after device_set_wakeup_capable() [ 3.680630] pci 0000:00:14.2: after pci_pme_active() [ 3.685695] pci 0000:00:14.3: [1022:780e] type 00 class 0x060100 [ 3.691743] pci 0000:00:14.4: [1022:780f] type 01 class 0x060401 [ 3.697718] pci 0000:00:14.5: [1022:7809] type 00 class 0x0c0310 [ 3.703639] pci 0000:00:14.5: reg 0x10: [mem 0xf01ce000-0xf01cefff] [ 3.709746] pci 0000:00:15.0: [1022:43a0] type 01 class 0x060400 [ 3.715653] pci 0000:00:15.0: enabling Extended Tags [ 3.720663] pci 0000:00:15.0: supports D1 D2 [ 3.724715] pci 0000:00:15.1: [1022:43a1] type 01 class 0x060400 [ 3.731657] pci 0000:00:15.1: enabling Extended Tags [ 3.736664] pci 0000:00:15.1: supports D1 D2 [ 3.740718] pci 0000:00:15.2: [1022:43a2] type 01 class 0x060400 [ 3.746654] pci 0000:00:15.2: enabling Extended Tags [ 3.751663] pci 0000:00:15.2: supports D1 D2 [ 3.755694] pci 0000:00:18.0: calling quirk_mmio_always_on+0x0/0x10 @ 1 […] [ 3.872695] pci_bus 0000:01: extended config space not accessible [ 3.878676] pci 0000:00:14.4: PCI bridge to [bus 01] (subtractive decode) [ 3.885630] pci 0000:00:14.4: bridge window [io 0x0000-0xffff] [ 3.891632] pci 0000:00:14.4: bridge window [io 0x0000-0x0cf7 window] (subtractive decode) [ 3.900628] pci 0000:00:14.4: bridge window [io 0x0d00-0xffff window] (subtractive decode) [ 3.908628] pci 0000:00:14.4: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) [ 3.917628] pci 0000:00:14.4: bridge window [mem 0x000c0000-0x000dffff] (subtractive decode) [ 3.925628] pci 0000:00:14.4: bridge window [mem 0x80000000-0xffffffff] (subtractive decode) [ 3.934660] pci 0000:00:15.0: PCI bridge to [bus 02] [ 3.939631] pci 0000:00:15.0: bridge window [io 0x0000-0xffffffff] [ 3.945694] pci 0000:03:00.0: [1b21:1042] type 00 class 0x0c0330 [ 3.951664] pci 0000:03:00.0: reg 0x10: [mem 0xf0000000-0xf0007fff 64bit] [ 3.958796] pci 0000:03:00.0: PME# supported from D3hot D3cold [ 3.964628] pci 0000:03:00.0: pme_poll = true [ 3.969627] pci 0000:03:00.0: after device_set_wakeup_capable() [ 3.975631] pci 0000:03:00.0: after pci_pme_active() [ 3.980654] pci 0000:03:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:15.1 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link) [ 3.997679] pci 0000:00:15.1: PCI bridge to [bus 03] [ 4.002634] pci 0000:00:15.1: bridge window [io 0x0000-0xffffffff] [ 4.008630] pci 0000:00:15.1: bridge window [mem 0xf0000000-0xf00fffff] [ 4.015635] pci 0000:00:15.2: bridge configuration invalid ([bus 00-00]), reconfiguring [ 4.023724] pci 0000:04:00.0: [10ec:8168] type 00 class 0x020000 [ 4.029644] pci 0000:04:00.0: reg 0x10: [io 0x0000-0x00ff] [ 4.034647] pci 0000:04:00.0: reg 0x18: [mem 0x00000000-0x00000fff 64bit pref] [ 4.042640] pci 0000:04:00.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref] [ 4.049725] pci 0000:04:00.0: supports D1 D2 [ 4.053628] pci 0000:04:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 4.060629] pci 0000:04:00.0: pme_poll = true [ 4.064628] pci 0000:04:00.0: after device_set_wakeup_capable() [ 4.070630] pci 0000:04:00.0: after pci_pme_active() [ 4.078681] pci 0000:00:15.2: PCI bridge to [bus 04-ff] [ 4.083634] pci 0000:00:15.2: bridge window [io 0x0000-0x0fff] [ 4.089630] pci 0000:00:15.2: bridge window [mem 0x00000000-0x000fffff] [ 4.096631] pci 0000:00:15.2: bridge window [mem 0x00000000-0x000fffff 64bit pref] [ 4.103629] pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04 [ 4.110631] pci_bus 0000:00: on NUMA node 0 [ 4.114828] ACPI: PCI Interrupt Link [INTA] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.121659] ACPI: PCI Interrupt Link [INTB] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.128658] ACPI: PCI Interrupt Link [INTC] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.135657] ACPI: PCI Interrupt Link [INTD] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.142658] ACPI: PCI Interrupt Link [INTE] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.148656] ACPI: PCI Interrupt Link [INTF] (IRQs 9) *0 [ 4.154657] ACPI: PCI Interrupt Link [INTG] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.161657] ACPI: PCI Interrupt Link [INTH] (IRQs 3 4 5 7 10 11 12 15) *0 [ 4.167719] initcall acpi_init+0x0/0x2bd returned 0 after 969726 usecs […] [ 5.150814] calling pcibios_assign_resources+0x0/0x91 @ 1 [ 5.156316] pci 0000:00:15.2: BAR 9: assigned [mem 0x80000000-0x800fffff 64bit pref] [ 5.164060] pci 0000:00:15.2: BAR 7: assigned [io 0x1000-0x1fff] [ 5.170149] pci 0000:00:11.0: BAR 4: assigned [io 0x2000-0x200f] [ 5.176245] pci 0000:00:11.0: BAR 0: assigned [io 0x2010-0x2017] [ 5.182337] pci 0000:00:11.0: BAR 2: assigned [io 0x2018-0x201f] [ 5.188431] pci 0000:00:11.0: BAR 1: assigned [io 0x2020-0x2023] [ 5.194524] pci 0000:00:11.0: BAR 3: assigned [io 0x2024-0x2027] [ 5.200619] pci 0000:00:14.4: PCI bridge to [bus 01] [ 5.205590] pci 0000:00:15.0: PCI bridge to [bus 02] [ 5.210561] pci 0000:00:15.1: PCI bridge to [bus 03] [ 5.215525] pci 0000:00:15.1: bridge window [mem 0xf0000000-0xf00fffff] [ 5.222313] pci 0000:04:00.0: BAR 4: assigned [mem 0x80000000-0x80003fff 64bit pref] [ 5.230062] pci 0000:04:00.0: BAR 2: assigned [mem 0x80004000-0x80004fff 64bit pref] [ 5.237810] pci 0000:04:00.0: BAR 0: assigned [io 0x1000-0x10ff] [ 5.243903] pci 0000:00:15.2: PCI bridge to [bus 04] [ 5.248866] pci 0000:00:15.2: bridge window [io 0x1000-0x1fff] [ 5.254964] pci 0000:00:15.2: bridge window [mem 0x80000000-0x800fffff 64bit pref] […] [ 6.874003] calling pcie_portdrv_init+0x0/0x34 @ 1 [ 6.878886] tsc: Refined TSC clocksource calibration: 3900.222 MHz [ 6.885069] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x7070574e4ad, max_idle_ns: 881590678092 ns [ 6.895201] pcieport 0000:00:15.0: PME: Signaling with IRQ 24 [ 6.900958] clocksource: Switched to clocksource tsc [ 6.901197] pcieport 0000:00:15.1: PME: Signaling with IRQ 25 [ 6.911718] pcieport 0000:00:15.2: enabling device (0000 -> 0003) [ 6.917894] pcieport 0000:00:15.2: PME: Signaling with IRQ 26 [ 6.923697] initcall pcie_portdrv_init+0x0/0x34 returned 0 after 43763 usecs […] [ 7.713476] calling rtl8139_init_module+0x0/0x16 @ 1 [ 7.718532] initcall rtl8139_init_module+0x0/0x16 returned 0 after 9 usecs [ 7.725403] calling rtl8169_pci_driver_init+0x0/0x16 @ 1 [ 7.730818] r8169 0000:04:00.0: enabling device (0000 -> 0003) [ 7.737139] kworker/u4:3 (74) used greatest stack depth: 7064 bytes left [ 7.737417] libphy: r8169: probed [ 7.747418] r8169 0000:04:00.0 eth0: RTL8168f/8111f, 08:60:6e:74:7a:51, XID 480, IRQ 27 [ 7.755419] r8169 0000:04:00.0 eth0: jumbo features [frames: 9194 bytes, tx checksumming: ko] [ 7.763947] initcall rtl8169_pci_driver_init+0x0/0x16 returned 0 after 32368 usecs
Change-Id: Ia1d60a212b0d249c7d8b3f8ec16baf5e93c985da Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/asus/f2a85-m/buildOpts.c M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/46527/3