[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/denverton_ns: Select CPU_INTEL_FIRMWARE_INTERFACE_TABLE

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/26928 )

Change subject: soc/intel/denverton_ns: Select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
......................................................................

soc/intel/denverton_ns: Select CPU_INTEL_FIRMWARE_INTERFACE_TABLE

* Add CPU_INTEL_FIRMWARE_INTERFACE_TABLE

Change-Id: I9d4901ea56d5bf5225a8f3a6015d2ea80a9e46b5
Signed-off-by: Vanessa Eusebio 
Reviewed-on: https://review.coreboot.org/c/26928
Reviewed-by: Patrick Rudolph 
Reviewed-by: Nico Huber 
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/denverton_ns/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, but someone else must approve
  Patrick Rudolph: Looks good to me, approved
  David Guckian: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 1096549..e34e4d1 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -56,6 +56,7 @@
    select TSC_SYNC_MFENCE
    select UDELAY_TSC
    select UDK_2015_BINDING
+	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE

config FSP_T_ADDR
    hex "Intel FSP-T (temp ram init) binary location"