Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35739 )
Change subject: soc/intel/common/block: Update microcode serialized for HT threads ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35739/5/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/mp_init.c:
https://review.coreboot.org/c/coreboot/+/35739/5/src/soc/intel/common/block/... PS5, Line 46: intel_ht_sibling_spin_lock(); This is assuming that all microcode loading needs to be serialized on hyperthreads. There's a whole sequence in src/cpu/x86/sipi_vector.S that should be coordinated. I don't think we should have 2 different things colliding here regarding policy.
See get_microcode_info() below where it provides the ability to load in parallel when starting up the APs in assembly.
https://review.coreboot.org/c/coreboot/+/35739/5/src/soc/intel/common/block/... PS5, Line 139: *parallel = 1; See here regarding my previous comment. Clearly you have some devices which need the lock while others don't. I think the policy should follow based on opt-in behavior.