Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas.
Kevin Keijzer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 )
Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ......................................................................
Patch Set 8: Code-Review+1
(6 comments)
File src/mainboard/asrock/b75m-itx/board_info.txt:
https://review.coreboot.org/c/coreboot/+/73097/comment/64253804_4afdeefd PS7, Line 2: http
https
Done
File src/mainboard/asrock/b75m-itx/cmos.layout:
https://review.coreboot.org/c/coreboot/+/73097/comment/a9e4b39f_a294e6ea PS7, Line 86: cpu_fan_header
cpu_fan_tach_src
Done
File src/mainboard/asrock/b75m-itx/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/73097/comment/62d1ac8b_b050bdf6 PS7, Line 7: register "gpu_panel_port_select" = "PANEL_PORT_LVDS" : register "gpu_panel_power_cycle_delay" = "4"
This seems incorrect. It can be dropped.
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/dbc7591e_2d0973d1 PS7, Line 14: device pci 01.0 off end
This should be enabled, the board has a PCIe x16 slot.
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/55f0b12d_cf9f23eb PS7, Line 19: register "docking_supported" = "0"
The devicetree "registers" translate to a C struct initialiser. […]
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/ccf722e0_bbc766ac PS7, Line 23: register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" : register "pcie_port_coalesce" = "false"
See reasoning above, these can be dropped as well.
Done