Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33941 )
Change subject: soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H ......................................................................
Patch Set 7:
(2 comments)
I have added a comment in both places identifying the incorrect documentation.
https://review.coreboot.org/#/c/33941/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33941/5//COMMIT_MSG@9 PS5, Line 9: Soem
Some
Done
https://review.coreboot.org/#/c/33941/5/src/soc/intel/cannonlake/include/soc... File src/soc/intel/cannonlake/include/soc/pmc.h:
https://review.coreboot.org/#/c/33941/5/src/soc/intel/cannonlake/include/soc... PS5, Line 119: #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
I would really appreciate a comment here above the numbers […]
Done