Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33557
Change subject: soc/intel/skylake: Select microcode updates depending on discrete PCH ......................................................................
soc/intel/skylake: Select microcode updates depending on discrete PCH
Change-Id: I05e97484605306afc70c726187bda8091216c9cc Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/skylake/Makefile.inc 1 file changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/33557/1
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index e9f555f..129586a 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -81,15 +81,17 @@ postcar-y += i2c.c postcar-y += uart.c
- -# Skylake D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) # Skylake H Q0 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506ex/microcode.bin -# Kabylake H0, Y0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin # Kabylake HB0 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +else +# Skylake D0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +# Kabylake H0, Y0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +endif # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples.