[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Update the FIVR configurations

[V Sowmya (Code Review)]

V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63356 )

Change subject: mb/intel/adlrvp: Update the FIVR configurations
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mb/intel/adlrvp: Update the FIVR configurations

This patch sets the optimized FIVR configuration for adlrvp-n cutomized
based on the pnp measurements to achieve the better power savings in
sleep states.
* Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3,
  S4, S5 states.
* Update the supported voltage states.
* Set the ICC max to 500mA for v1p05 and vnn.

Signed-off-by: V Sowmya 
Change-Id: I06298eb1aec07eae34420c5736e912c707fefbc4
---
M src/mainboard/intel/adlrvp/devicetree_n.cb
1 file changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/63356/1

diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb
index 2b7eca6..96b9e44 100644
--- a/src/mainboard/intel/adlrvp/devicetree_n.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_n.cb
@@ -150,6 +150,21 @@
    	},
    }"

+	# FIVR configurations
+	register "ext_fivr_settings" = "{
+		.configure_ext_fivr = 1,
+		.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
+		.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
+		.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
+		.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
+		.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
+		.v1p05_voltage_mv = 1050,
+		.vnn_voltage_mv = 1050,
+		.vnn_sx_voltage_mv = 1050,
+		.v1p05_icc_max_ma = 500,
+		.vnn_icc_max_ma = 500,
+	}"
+
    device domain 0 on
    	device ref igpu on end
    	device ref ipu on