[coreboot-gerrit] Change in coreboot[master]: vendorcode/amd/agesa/f12/Proc/CPU: Fix set MTRR6 and MTRR7 to default

[Michał Żygowski (Code Review)]

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36000 )

Change subject: vendorcode/amd/agesa/f12/Proc/CPU: Fix set MTRR6 and MTRR7 to default
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Patch Set 1:

Leaving the variable MTRRs unclean may lead to MTRR overlapping, which follows the rules below:

1. If the memory types are identical, then that memory type is used.
2. If at least one of the memory types is UC, the UC memory type is used.
3. If at least one of the memory types is WT, and the only other memory type is WB, then the WT memory type is used.
4. If the combination of memory types does not match any above, then the memory type used is undefined.

In the worst case (4) it may lead to undefined behaviours. A sane bootloader, OS should check for that, however how it can determine then, which MTRR is/was correct?