Attention is currently required from: Jason Glenesk, Anjaneya "Reddy" Chagam, Raul Rangel, Marshall Dawson, Jonathan Zhang, Johnny Lin, Morgan Jang, Patrick Rudolph, Felix Held. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54301 )
Change subject: [WIP]arch/x86: Tear down CAR in ramstage ......................................................................
[WIP]arch/x86: Tear down CAR in ramstage
Postcar is a 'full' stage to just run a few instructions to disable CAR and setup MTRR for ramstage. This takes up a lot of place in ROM. This functionality can be moved into ramstage.
Notes: Typically no caching is set up around cbmem so the LZMA compressed ramstage is being decompressed in uncached memory, which is likely to be slow.
Change-Id: I02e5017ab2b6a6fd30b37edad19165c2531c8fd1 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/Kconfig M src/arch/x86/c_start.S M src/arch/x86/exit_car.S A src/arch/x86/exit_car.inc M src/arch/x86/postcar_loader.c M src/cpu/qemu-x86/Kconfig M src/cpu/x86/mtrr/Makefile.inc M src/lib/program.ld M src/mainboard/emulation/qemu-i440fx/Kconfig M src/mainboard/emulation/qemu-i440fx/Makefile.inc M src/soc/amd/common/block/cpu/car/Makefile.inc M src/soc/intel/common/block/cpu/Makefile.inc M src/soc/intel/xeon_sp/Kconfig 13 files changed, 56 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/54301/1
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index bb03db2..31170fa 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -207,12 +207,20 @@ hex default 0x2000000
+config RAMSTAGE_CAR_TEARDOWN + bool + depends on ARCH_X86 + depends on !RESET_VECTOR_IN_RAM + help + Tear down CAR in ramstage instead of in a separate postcar stage. + # Use the post CAR infrastructure for tearing down cache-as-ram # from a program loaded in RAM and subsequently loading ramstage. config POSTCAR_STAGE def_bool y depends on ARCH_X86 depends on !RESET_VECTOR_IN_RAM + depends on !RAMSTAGE_CAR_TEARDOWN
config VERSTAGE_DEBUG_SPINLOOP bool diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 19532d8..037bc21 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -59,6 +59,16 @@ movl %eax, _cbmem_top_ptr #endif
+#if CONFIG(RAMSTAGE_CAR_TEARDOWN) +#include <cpu/x86/mtrr.h> +#include "exit_car.inc" + TEARDOWN_CAR + + movl $_estack, %esp + andl $0xfffffff0, %esp + call postcar_mtrr_setup +#endif + /** poison the stack. Code should not count on the * stack being full of zeros. This stack poisoning * recently uncovered a bug in the broadcast SIPI diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index 2bf1ed9..d02e28b 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -4,6 +4,8 @@ #include <cpu/x86/cr.h> #include <cpu/x86/cache.h>
+#include "exit_car.inc" + /* Place the stack in the bss section. It's not necessary to define it in the * the linker script. */ .section .bss, "aw", @nobits @@ -44,21 +46,8 @@ clflush _cbmem_top_ptr
skip_clflush: - /* chipset_teardown_car() is expected to disable cache-as-ram. */ - call chipset_teardown_car
- /* Enable caching if not already enabled. */ -#ifdef __x86_64__ - mov %cr0, %rax - and $(~(CR0_CD | CR0_NW)), %eax - mov %rax, %cr0 -#else - mov %cr0, %eax - and $(~(CR0_CD | CR0_NW)), %eax - mov %eax, %cr0 -#endif - /* Ensure cache is clean. */ - invd + TEARDOWN_CAR
movl $_estack, %esp /* Align stack to 16 bytes at call instruction. */ diff --git a/src/arch/x86/exit_car.inc b/src/arch/x86/exit_car.inc new file mode 100644 index 0000000..4c0ba65 --- /dev/null +++ b/src/arch/x86/exit_car.inc @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <cpu/x86/cr.h> +#include <cpu/x86/cache.h> + +.macro TEARDOWN_CAR + /* chipset_teardown_car() is expected to disable cache-as-ram. */ + call chipset_teardown_car + + /* Enable caching if not already enabled. */ +#ifdef __x86_64__ + mov %cr0, %rax + and $(~(CR0_CD | CR0_NW)), %eax + mov %rax, %cr0 +#else + mov %cr0, %eax + and $(~(CR0_CD | CR0_NW)), %eax + mov %eax, %cr0 +#endif + /* Ensure cache is clean. */ + invd +.endm diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index 9f5c47c..56c8776 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -131,8 +131,11 @@
void run_postcar_phase(struct postcar_frame *pcf) { - struct prog prog = - PROG_INIT(PROG_POSTCAR, CONFIG_CBFS_PREFIX "/postcar"); +#if CONFIG(RAMSTAGE_CAR_TEARDOWN) + struct prog prog = PROG_INIT(PROG_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); +#else + struct prog prog = PROG_INIT(PROG_POSTCAR, CONFIG_CBFS_PREFIX "/postcar"); +#endif
if (resume_from_stage_cache()) { stage_cache_load_stage(STAGE_POSTCAR, &prog); diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 85f99e9..da66833 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -51,12 +51,10 @@ config CPU_QEMU_X86_64 bool "Experimental 64bit support" select ARCH_ALL_STAGES_X86_64 - select ARCH_POSTCAR_X86_64
config CPU_QEMU_X86_32 bool default n if CPU_QEMU_X86_64 default y select ARCH_ALL_STAGES_X86_32 - select ARCH_POSTCAR_X86_32 endif diff --git a/src/cpu/x86/mtrr/Makefile.inc b/src/cpu/x86/mtrr/Makefile.inc index a78517a..773c507 100644 --- a/src/cpu/x86/mtrr/Makefile.inc +++ b/src/cpu/x86/mtrr/Makefile.inc @@ -4,6 +4,7 @@ bootblock-y += earlymtrr.c verstage_x86-y += earlymtrr.c postcar-y += earlymtrr.c +ramstage-y += earlymtrr.c
bootblock-y += debug.c romstage-y += debug.c diff --git a/src/lib/program.ld b/src/lib/program.ld index 8180d9f..32b4cb2 100644 --- a/src/lib/program.ld +++ b/src/lib/program.ld @@ -83,7 +83,7 @@ * traditional stages in the coreboot infrastructure. Therefore it's easier * to specialize this case. */ -#if ENV_RMODULE || ENV_POSTCAR +#if ENV_RMODULE || ENV_POSTCAR || ENV_RAMSTAGE _rmodule_params = .; KEEP(*(.module_parameters)); _ermodule_params = .; diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index 19f0fca..ebe17e4 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -16,6 +16,7 @@ select HAVE_ASAN_IN_ROMSTAGE select NO_SMM select BOOT_DEVICE_NOT_SPI_FLASH + select RAMSTAGE_CAR_TEARDOWN
config VBOOT select VBOOT_MUST_REQUEST_DISPLAY diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.inc b/src/mainboard/emulation/qemu-i440fx/Makefile.inc index cac74ee..11f7c43 100644 --- a/src/mainboard/emulation/qemu-i440fx/Makefile.inc +++ b/src/mainboard/emulation/qemu-i440fx/Makefile.inc @@ -8,3 +8,4 @@ ramstage-y += fw_cfg.c ramstage-y += memmap.c ramstage-y += northbridge.c +ramstage-y += exit_car.S diff --git a/src/soc/amd/common/block/cpu/car/Makefile.inc b/src/soc/amd/common/block/cpu/car/Makefile.inc index 130b34b..b7726c1 100644 --- a/src/soc/amd/common/block/cpu/car/Makefile.inc +++ b/src/soc/amd/common/block/cpu/car/Makefile.inc @@ -5,6 +5,7 @@ bootblock-y += exit_car.S
postcar-y += exit_car.S +ramstage-y += exit_car.S
romstage-y += ap_exit_car.S romstage-y += exit_car.S diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc index 42e392c..c9ea474 100644 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ b/src/soc/intel/common/block/cpu/Makefile.inc @@ -2,6 +2,7 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S ifeq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y) postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car.S +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car.S else postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S endif @@ -9,6 +10,7 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S endif
bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 09f72a3..e93a279 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -33,7 +33,6 @@ select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS select FSP_T_XIP select FSP_M_XIP - select POSTCAR_STAGE select IOAPIC select PARALLEL_MP select PARALLEL_MP_AP_WORK @@ -60,6 +59,7 @@ select REG_SCRIPT select NO_FSP_TEMP_RAM_EXIT select INTEL_CAR_NEM # For postcar only now + select RAMSTAGE_CAR_TEARDOWN
config MAINBOARD_USES_FSP2_0 bool @@ -70,7 +70,6 @@ depends on MAINBOARD_USES_FSP2_0 select PLATFORM_USES_FSP2_0 select UDK_202005_BINDING - select POSTCAR_STAGE
config MAX_SOCKET int