[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Allow fine grained control of S0iX states

[Jes Klinke (Code Review)]

Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44355 )

Change subject: soc/intel/tigerlake: Allow fine grained control of S0iX states
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Patch Set 3:

Only now do I realize that the LpmStateEnableMask I am working with in mainboard_silicon_init_params() is actually the params struct, which already has LpmStateEnableMask, and not the config struct which I am adding a field to in this CL.
https://review.coreboot.org/c/coreboot/+/44359/4/src/mainboard/google/voltee...

This means, as far as I can tell, that this CL is unnecessary.