Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31246 )
Change subject: soc/intel/cannonlake: Take ITSS polarity snaphot after GPIO configuration ......................................................................
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this should be across all soc then ?
Yes, it looks like this will be required for all SoCs. I am wondering if we should just move snapshot/restore to do_silicon_init() in silicon_init.c
APL/GLK is special since it calls gpio config differently
than what
KBL/CNL do. Hence, this issue was never seen on platforms
using
APL/GLK.
do_silicon_init() in silicon_init.c is in fsp driver (which is
common between small and big cores) i believe then we might need to make use of common PCH Kconfig option to achieve this.
Yes, This has to be common across SOCs. Will check and revise the
implementation.
Thinking about this again: Its okay to just do this in every SoC like it is done right now. However, we should fix FSP to not touch the GPIO IRQ polarities. Subrata, can you please follow up on this?
i think its been taken care in ICL as i know where only IPC0 is something that FSP should bother rest should be don't care for FSP. I can check if same CL need to be ported for CNL/CFL/CML