Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40722
to look at the new patch set (#3).
Change subject: [WIP] Add Multiple Segment support ......................................................................
[WIP] Add Multiple Segment support
Test Patch for get feedback on design aspect
Additional PCI1 device been created based on TCSS_PCIE_SEGMENT selection from MB Kconfig
extracted build/dsdt.aml
Device (PCI1) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_SEG, One) // _SEG: PCI Segment Name (_UID, One) // _UID: Unique ID Name (_ADR, Zero) // _ADR: Address .... }
Change-Id: Ide7e97aa7c48fd0e993b248b38b2ad6ad94a21cb Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/tglrvp/dsdt.asl M src/soc/intel/apollolake/systemagent.c M src/soc/intel/cannonlake/systemagent.c M src/soc/intel/common/block/acpi/acpi.c A src/soc/intel/common/block/acpi/acpi/extrahostbridge.asl A src/soc/intel/common/block/acpi/acpi/pcisegment.asl M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/Kconfig M src/soc/intel/common/block/systemagent/systemagent_def.h M src/soc/intel/common/block/systemagent/systemagent_early.c A src/soc/intel/common/block/tcss/Kconfig M src/soc/intel/icelake/systemagent.c M src/soc/intel/jasperlake/systemagent.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/systemagent.c M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/acpi/pci_irqs.asl M src/soc/intel/tigerlake/include/soc/irq.h M src/soc/intel/tigerlake/systemagent.c 19 files changed, 195 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/40722/3