[coreboot-gerrit] Change in coreboot[master]: stoneyridge: Enable APSM on PCI express

[Simon Glass (Code Review)]

Simon Glass has uploaded this change for review. ( https://review.coreboot.org/27464

Change subject: stoneyridge: Enable APSM on PCI express
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stoneyridge: Enable APSM on PCI express

We should use active-state power management where possible to reduced
power consumption during normal operation. Enable these options.

Note that PCIEXP_COMMON_CLOCK is left disabled, since at least on Grunt
the WLAN module seems to generate its own clock. Perhaps I misunderstand
the meaning of that setting.

BUG=b:110041917
TEST=boot on grunt, see that WiFi and eMMC still run OK

Change-Id: Ia7c711304ffe460a9fb0d4f654a51485958239ea
Signed-off-by: Simon Glass 
---
M src/soc/amd/stoneyridge/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/27464/1

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 05c3043..e883929 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -66,6 +66,9 @@
    select SSE
    select SSE2
    select RTC
+	select PCIEXP_ASPM
+	select PCIEXP_CLK_PM
+	select PCIEXP_L1_SUB_STATE

config VBOOT
    select VBOOT_SEPARATE_VERSTAGE