Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17200
-gerrit
commit d075d4692a456ce3b612ad89d34c1b455cb95470 Author: Venkateswarlu Vinjamuri venkateswarlu.v.vinjamuri@intel.com Date: Mon Oct 31 17:03:55 2016 -0700
soc/intel/apollolake: Disable Monitor and Mwait feature
Monitor/Mwait is broken on APL. So, it needs to be disabled.
BUG=chrome-os-partner:56922 BRANCH=None
Change-Id: I12cd4280de62e0a639b43538171660ee4c0a0265 Signed-off-by: Venkateswarlu Vinjamuri venkateswarlu.v.vinjamuri@intel.com --- src/soc/intel/apollolake/cpu.c | 4 ++++ src/soc/intel/apollolake/include/soc/cpu.h | 2 ++ 2 files changed, 6 insertions(+)
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index bd5cff5..f6aa3a6 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -29,6 +29,7 @@ #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/smm.h> +#include <cpu/intel/turbo.h>
static const struct reg_script core_msr_script[] = { /* Enable C-state and IO/MWAIT redirect */ @@ -40,6 +41,8 @@ static const struct reg_script core_msr_script[] = { (ACPI_PMIO_CST_REG | (PMG_IO_BASE_CST_RNG_BLK_SIZE << 16))), /* Disable C1E */ REG_MSR_RMW(MSR_POWER_CTL, ~0x2, 0), + /* Disable support for MONITOR and MWAIT instructions */ + REG_MSR_RMW(MSR_IA32_MISC_ENABLES, ~MONITOR_MWAIT_DIS_MASK, 0), REG_SCRIPT_END };
@@ -47,6 +50,7 @@ static void soc_core_init(device_t cpu) { /* Set core MSRs */ reg_script_run(core_msr_script); + }
static struct device_operations cpu_dev_ops = { diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h index e94972d..2ecab7f 100644 --- a/src/soc/intel/apollolake/include/soc/cpu.h +++ b/src/soc/intel/apollolake/include/soc/cpu.h @@ -62,6 +62,8 @@ void apollolake_init_cpus(struct device *dev); #define IO_MWAIT_REDIRECT_MASK 0x400 /* Set MSR_PMG_CST_CONFIG_CONTROL[15] to lock CST_CFG [0-15] bits */ #define CST_CFG_LOCK_MASK 0x8000 +/* Disable the Monitor Mwait FSM feature */ +#define MONITOR_MWAIT_DIS_MASK 0x40000
#define MSR_PMG_CST_CONFIG_CONTROL 0xe2 #define MSR_PMG_IO_CAPTURE_BASE 0xe4