Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38230 )
Change subject: sb/intel/common: Add smbus_set_slave_addr() ......................................................................
sb/intel/common: Add smbus_set_slave_addr()
Change-Id: I7dddb61fab00e0f4f67d4eebee0cfe8dcd99f4ab Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/include/device/smbus_host.h M src/soc/intel/broadwell/include/soc/smbus.h M src/soc/intel/broadwell/smbus.c M src/soc/intel/cannonlake/include/soc/smbus.h M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/denverton_ns/include/soc/smbus.h M src/soc/intel/icelake/include/soc/smbus.h M src/soc/intel/skylake/include/soc/smbus.h M src/soc/intel/tigerlake/include/soc/smbus.h M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/bd82x6x/smbus.c M src/southbridge/intel/common/smbus.c M src/southbridge/intel/common/smbus.h M src/southbridge/intel/ibexpeak/pch.h M src/southbridge/intel/ibexpeak/smbus.c M src/southbridge/intel/lynxpoint/pch.h M src/southbridge/intel/lynxpoint/smbus.c 17 files changed, 14 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/38230/1
diff --git a/src/include/device/smbus_host.h b/src/include/device/smbus_host.h index 8317e17..2a02fb7 100644 --- a/src/include/device/smbus_host.h +++ b/src/include/device/smbus_host.h @@ -35,6 +35,6 @@ /* Upstream API */
void smbus_host_reset(uintptr_t base); - +void smbus_set_slave_addr(uintptr_t base, u8 slave_address);
#endif diff --git a/src/soc/intel/broadwell/include/soc/smbus.h b/src/soc/intel/broadwell/include/soc/smbus.h index 40aaf43..ed37373 100644 --- a/src/soc/intel/broadwell/include/soc/smbus.h +++ b/src/soc/intel/broadwell/include/soc/smbus.h @@ -22,7 +22,6 @@ #define SMB_BASE 0x20 #define HOSTC 0x40 #define HST_EN (1 << 0) -#define SMB_RCV_SLVA 0x09
/* SMBus I/O bits. */ #define SMBHSTSTAT 0x0 diff --git a/src/soc/intel/broadwell/smbus.c b/src/soc/intel/broadwell/smbus.c index c32e31d..0ac2ffc 100644 --- a/src/soc/intel/broadwell/smbus.c +++ b/src/soc/intel/broadwell/smbus.c @@ -24,7 +24,6 @@ #include <soc/iomap.h> #include <soc/ramstage.h> #include <soc/smbus.h> -#include <southbridge/intel/common/smbus.h> #include <device/smbus_host.h>
static void pch_smbus_init(struct device *dev) @@ -40,7 +39,7 @@ /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); if (res) - outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); + smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); }
static int lsmbus_read_byte(struct device *dev, u8 address) diff --git a/src/soc/intel/cannonlake/include/soc/smbus.h b/src/soc/intel/cannonlake/include/soc/smbus.h index e3d93a2..54d0d6c 100644 --- a/src/soc/intel/cannonlake/include/soc/smbus.h +++ b/src/soc/intel/cannonlake/include/soc/smbus.h @@ -19,10 +19,6 @@ #ifndef _SOC_CANNONLAKE_SMBUS_H_ #define _SOC_CANNONLAKE_SMBUS_H_
-/* IO and MMIO registers under primary BAR */ -/* Set address for PCH as SMBus slave role */ -#define SMB_RCV_SLVA 0x09 - /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 #define TCO_TIMEOUT (1 << 3) diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index ce75f3a..a99efaf 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -13,14 +13,12 @@ * GNU General Public License for more details. */
-#include <arch/io.h> #include <device/device.h> #include <device/path.h> #include <device/smbus.h> #include <device/pci.h> #include <device/pci_ids.h> #include <soc/smbus.h> -#include <southbridge/intel/common/smbus.h> #include <device/smbus_host.h> #include "smbuslib.h"
@@ -63,7 +61,7 @@ /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); if (res) - outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); + smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); }
static void smbus_read_resources(struct device *dev) diff --git a/src/soc/intel/denverton_ns/include/soc/smbus.h b/src/soc/intel/denverton_ns/include/soc/smbus.h index 5dbeecc..5668440 100644 --- a/src/soc/intel/denverton_ns/include/soc/smbus.h +++ b/src/soc/intel/denverton_ns/include/soc/smbus.h @@ -25,7 +25,7 @@ #define HST_EN (1 << 0) #define HOSTC_SMI_EN (1 << 1) #define HOSTC_I2C_EN (1 << 2) -#define SMB_RCV_SLVA 0x09 + /* SMBUS TCO base address. */ #define TCOBASE 0x50 #define MASK_TCOBASE 0xffe0 diff --git a/src/soc/intel/icelake/include/soc/smbus.h b/src/soc/intel/icelake/include/soc/smbus.h index f4f5b11..9d8fe46 100644 --- a/src/soc/intel/icelake/include/soc/smbus.h +++ b/src/soc/intel/icelake/include/soc/smbus.h @@ -16,10 +16,6 @@ #ifndef _SOC_ICELAKE_SMBUS_H_ #define _SOC_ICELAKE_SMBUS_H_
-/* IO and MMIO registers under primary BAR */ -/* Set address for PCH as SMBus slave role */ -#define SMB_RCV_SLVA 0x09 - /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 #define TCO_TIMEOUT (1 << 3) diff --git a/src/soc/intel/skylake/include/soc/smbus.h b/src/soc/intel/skylake/include/soc/smbus.h index aad57aa..ee257ea 100644 --- a/src/soc/intel/skylake/include/soc/smbus.h +++ b/src/soc/intel/skylake/include/soc/smbus.h @@ -19,9 +19,6 @@ #ifndef _SOC_SMBUS_H_ #define _SOC_SMBUS_H_
-/* PCI Configuration Space (D31:F3): SMBus */ -#define SMB_RCV_SLVA 0x09 - /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 #define TCO_TIMEOUT (1 << 3) diff --git a/src/soc/intel/tigerlake/include/soc/smbus.h b/src/soc/intel/tigerlake/include/soc/smbus.h index 9226fba..50ea044 100644 --- a/src/soc/intel/tigerlake/include/soc/smbus.h +++ b/src/soc/intel/tigerlake/include/soc/smbus.h @@ -23,8 +23,6 @@ #define _SOC_TIGERLAKE_SMBUS_H_
/* IO and MMIO registers under primary BAR */ -/* Set address for PCH as SMBus slave role */ -#define SMB_RCV_SLVA 0x09
/* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 089d458..5f353af 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -238,7 +238,6 @@ #define PCH_SMBUS_DEV PCI_DEV(0, 0x1f, 3) #define SMB_BASE 0x20 #define HOSTC 0x40 -#define SMB_RCV_SLVA 0x09
/* HOSTC bits */ #define I2C_EN (1 << 2) diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c index 0a9c175..b011c49 100644 --- a/src/southbridge/intel/bd82x6x/smbus.c +++ b/src/southbridge/intel/bd82x6x/smbus.c @@ -20,8 +20,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <arch/io.h> -#include <southbridge/intel/common/smbus.h> #include <device/smbus_host.h> #include "pch.h"
@@ -38,7 +36,7 @@ /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); if (res) - outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); + smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); }
static int lsmbus_read_byte(struct device *dev, u8 address) diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index b5141d7..1085cbd 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -101,6 +101,11 @@ host_update(base, SMBHSTSTAT, 0xff, 0); }
+void smbus_set_slave_addr(uintptr_t base, u8 slave_address) +{ + host_outb(base, SMB_RCV_SLVA, slave_address); +} + static int host_completed(u8 status) { if (status & SMBHSTSTS_HOST_BUSY) diff --git a/src/southbridge/intel/common/smbus.h b/src/southbridge/intel/common/smbus.h index 20443e1..e72203e4 100644 --- a/src/southbridge/intel/common/smbus.h +++ b/src/southbridge/intel/common/smbus.h @@ -32,4 +32,6 @@ #define SMBUS_PIN_CTL 0xf #define SMBSLVCMD 0x11
+#define SMB_RCV_SLVA SMBTRNSADD + #endif diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h index 5785ef1..529b7a2 100644 --- a/src/southbridge/intel/ibexpeak/pch.h +++ b/src/southbridge/intel/ibexpeak/pch.h @@ -232,7 +232,6 @@ #define PCH_SMBUS_DEV PCI_DEV(0, 0x1f, 3) #define SMB_BASE 0x20 #define HOSTC 0x40 -#define SMB_RCV_SLVA 0x09
/* HOSTC bits */ #define I2C_EN (1 << 2) diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c index 9168cff..accbe68 100644 --- a/src/southbridge/intel/ibexpeak/smbus.c +++ b/src/southbridge/intel/ibexpeak/smbus.c @@ -20,8 +20,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <arch/io.h> -#include <southbridge/intel/common/smbus.h> #include <device/smbus_host.h> #include "pch.h"
@@ -38,7 +36,7 @@ /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); if (res) - outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); + smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); }
static int lsmbus_read_byte(struct device *dev, u8 address) diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index d83dd17..71f42ea 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -440,7 +440,6 @@ #define PCH_SMBUS_DEV PCI_DEV(0, 0x1f, 3) #define SMB_BASE 0x20 #define HOSTC 0x40 -#define SMB_RCV_SLVA 0x09
/* HOSTC bits */ #define I2C_EN (1 << 2) diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index 24beaf2..ff659b8 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -20,8 +20,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <arch/io.h> -#include <southbridge/intel/common/smbus.h> #include <device/smbus_host.h> #include "pch.h"
@@ -38,7 +36,7 @@ /* Set Receive Slave Address */ res = find_resource(dev, PCI_BASE_ADDRESS_4); if (res) - outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); + smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); }
static int lsmbus_read_byte(struct device *dev, u8 address)