[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default

[Maximilian Brune (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier.

Hello Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/86272?usp=email

to look at the new patch set (#2).

Change subject: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default
......................................................................

soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default

TODO justification

Change-Id: Ie34bb2abc0211963b2613d1b50b1767df31c1062
Signed-off-by: Maximilian Brune 
---
M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
M src/soc/amd/cezanne/chipset.cb
2 files changed, 5 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/86272/2