[coreboot-gerrit] Change in coreboot[master]: intel/haswell: Remove some __PRE_RAM__ use

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35380 )

Change subject: intel/haswell: Remove some __PRE_RAM__ use
......................................................................

intel/haswell: Remove some __PRE_RAM__ use

Change-Id: I167e9a171af4fe7997ebb76cdfa22a4578817a55
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/intel/haswell/haswell.h
1 file changed, 1 insertion(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/35380/1

diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index f786caf..4c67ba8 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -130,9 +130,6 @@
 # error "CONFIG_IED_REGION_SIZE is not a power of 2"
 #endif

-#if !defined(__ROMCC__) // FIXME romcc should handle below constructs
-
-#if defined(__PRE_RAM__)
 struct pei_data;
 struct rcba_config_instruction;
 struct romstage_params {
@@ -142,18 +139,13 @@
    void (*copy_spd)(struct pei_data *);
 };
 void romstage_common(const struct romstage_params *params);
-#endif

-#ifdef __SMM__
 /* Lock MSRs */
 void intel_cpu_haswell_finalize_smm(void);
-#else
+
 /* Configure power limits for turbo mode */
 void set_power_limits(u8 power_limit_1_time);
 int cpu_config_tdp_levels(void);
-/* Determine if HyperThreading is disabled. The variable is not valid until
- * setup_ap_init() has been called. */
-#endif

/* CPU identification */
 int haswell_family_model(void);
@@ -161,5 +153,3 @@
 int haswell_is_ult(void);

#endif
-
-#endif