[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Modify the puff fmd files to support CSE Lite SKU

[V Sowmya (Code Review)]

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41198 )

Change subject: mb/google/hatch: Modify the puff fmd files to support CSE Lite SKU
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41198/6//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/41198/6//COMMIT_MSG@12 
PS6, Line 12: Reduce the coreboot RO size to 3MiB
> The SPI flash will only support power of 2 fractions for write-protect sizes so RO will have to be 2 […]

Thanks. I checked it and since the only supported protected densities are 1,2,4,8,16,32 (MiB), retained the RO size as 4MiB since 2MiB will not be enough to accommodate the debug fsp binaries.