[coreboot-gerrit] Change in coreboot[master]: sb/intel/common/rtc.c: Define __SIMPLE_DEVICE__

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50376 )

Change subject: sb/intel/common/rtc.c: Define __SIMPLE_DEVICE__
......................................................................

sb/intel/common/rtc.c: Define __SIMPLE_DEVICE__

Change-Id: Ie11fffdf907227ab315bfd4887aaa5de3602bd24
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/common/rtc.c
1 file changed, 3 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/50376/1

diff --git a/src/southbridge/intel/common/rtc.c b/src/southbridge/intel/common/rtc.c
index 63fc124..ef30d9a5 100644
--- a/src/southbridge/intel/common/rtc.c
+++ b/src/southbridge/intel/common/rtc.c
@@ -1,5 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#define __SIMPLE_DEVICE__
+
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
@@ -9,17 +11,11 @@
 #include "pmutil.h"
 #include "rtc.h"

-/* PCI Configuration Space (D31:F0): LPC */
-#if defined(__SIMPLE_DEVICE__)
 #define PCH_LPC_DEV	PCI_DEV(0, 0x1f, 0)
-#else
-#define PCH_LPC_DEV	pcidev_on_root(0x1f, 0)
-#endif

int rtc_failure(void)
 {
-	return !!(pci_read_config8(PCH_LPC_DEV, D31F0_GEN_PMCON_3)
-		  & RTC_BATTERY_DEAD);
+	return !!(pci_read_config8(PCH_LPC_DEV, D31F0_GEN_PMCON_3) & RTC_BATTERY_DEAD);
 }

void sb_rtc_init(void)