Attention is currently required from: Arthur Heymans. Hello Arthur Heymans,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/60535
to review the following change.
Change subject: [WIP]mb/prodrive/hermes: Fix BMC PCIe KVM ......................................................................
[WIP]mb/prodrive/hermes: Fix BMC PCIe KVM
While some older schematics say the BMC uses PCIe clock source 6 it looks like newer board revisions actually use Clock source 0.
TEST: See that a device is found under PCIe bridge 00.1d.6 and that KVM works in the BMC interface.
Change-Id: Iecf6fba5c37cc5834dac8a4437e893ca76bb87dc Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/prodrive/hermes/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/60535/1
diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb index db57382..6198eda 100644 --- a/src/mainboard/prodrive/hermes/devicetree.cb +++ b/src/mainboard/prodrive/hermes/devicetree.cb @@ -26,13 +26,13 @@ register "PchHdaDspEnable" = "0" register "PchHdaAudioLinkHda" = "1"
- register "PcieClkSrcUsage[0]" = "20" # PCIe Slot1 + register "PcieClkSrcUsage[0]" = "14" # PCIe Slot1, also BMC on some revisions? register "PcieClkSrcUsage[1]" = "0x40" # PCIe Slot2 register "PcieClkSrcUsage[2]" = "0x42" # PCIe Slot4 register "PcieClkSrcUsage[3]" = "0x41" # PCIe Slot6 register "PcieClkSrcUsage[4]" = "8" # RP9 M2 Slot M x4 register "PcieClkSrcUsage[5]" = "15" # RP16 M2 Slot E x1 - register "PcieClkSrcUsage[6]" = "14" # BMC + register "PcieClkSrcUsage[6]" = "20" # BMC, PCIe slot1 on later revisions? register "PcieClkSrcUsage[7]" = "4" # PHY 3 register "PcieClkSrcUsage[8]" = "PCIE_CLK_RP0" # PCIe Slot3 register "PcieClkSrcUsage[9]" = "5" # PHY 4