[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/gspi: Recalculate BAR after resource allocation

[Julius Werner (Code Review)]

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44084 )

Change subject: soc/intel/common/block/gspi: Recalculate BAR after resource allocation
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soc/intel/common/block/gspi: Recalculate BAR after resource allocation

The base address of the memory mapped I/O registers should not
be cached across resource allocation.  This CL will evict the cached
value upon exiting the BS_DEV_RESOURCES stage.

Change-Id: I81f2b5bfadbf1aaa3b38cca2bcc44ce521666821
Signed-off-by: [e-mail]
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44084
Reviewed-by: Karthik Ramasubramanian 
Reviewed-by: Furquan Shaikh 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/common/block/gspi/gspi.c
1 file changed, 12 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index 599ab7e..8363713 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -2,6 +2,7 @@

#include <device/mmio.h>
 #include <assert.h>
+#include <bootstate.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
@@ -257,6 +258,17 @@
    return gspi_base[gspi_bus];
 }

+/*
+ * PCI resource allocation will likely change the base address of the mapped
+ * I/O registers.  Clearing the cached value after the allocation step will
+ * cause it to be recomputed by gspi_calc_base_addr() on next access.
+ */
+static void gspi_clear_cached_base(void *unused)
+{
+	memset(gspi_base, 0, sizeof(gspi_base));
+}
+BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, gspi_clear_cached_base, NULL);
+
 /* Parameters for GSPI controller operation. */
 struct gspi_ctrlr_params {
    uintptr_t mmio_base;