[coreboot-gerrit] [L] Change in coreboot[main]: mb/erying: Add Erying Polestar G613 Pro (TGL-H)

[Michał Żygowski (Code Review)]

Attention is currently required from: Alicja Michalska.

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80853?usp=email )

Change subject: mb/erying: Add Erying Polestar G613 Pro (TGL-H)
......................................................................

Patch Set 1:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80853/comment/c79afa2d_abb54554 :
PS1, Line 25: even though I force-disabled it, I'm still getting AERs
That's because AER is still enabled:

`PcieRpAdvancedErrorReporting`

Disabling ASPM won't stop AER errors from occurring AFAIK.

https://review.coreboot.org/c/coreboot/+/80853/comment/1d8de382_b8eda4c0 :
PS1, Line 39: 
            : Likewise, I can't wrap my head around PCI-E AERs I'm getting if I boot
            : the machine without `pcie_aspm=off` parameter:
            : - BadTLP
            : - BadDLLP
            : - Timeout
            : - Rollover
            : 
            : Adjusting LaneEq's didn't change anything, all settings are configured
            : in (mostly) the same way as they were on stock firmware.
Without proper `PcieClkSrcClkReq` settings, the most you can get is ASPM L0s. ASPM L1 requires CLKREQ# signal to get the link back to L0.