Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8702
-gerrit
commit b33836b17cfe95f012017fc4081749ebd3ece15d Author: Stefan Reinauer reinauer@chromium.org Date: Mon Mar 16 16:53:27 2015 -0700
haswell: Fix monotonic timer integration
In some previous attempt to enable monotonic timers on all platforms, the LAPIC monotonic timer was selected for Haswell devices, despite the fact that LAPIC timers are not used in coreboot on Haswell (See haswell Kconfig) and there already was a monotonic timer implementation enabled that just needed to be added for SMM as well.
Change-Id: I6beb2977864e507956636860ed463e1991cea1ed Signed-off-by: Stefan Reinauer reinauer@google.com --- src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/haswell/Makefile.inc | 1 + 2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 4732623..741b677 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -25,7 +25,6 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select PARALLEL_CPU_INIT select PARALLEL_MP - select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 2518e9a..82d3bec 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -11,5 +11,6 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c +smm-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c
cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc