[coreboot-gerrit] Change in coreboot[master]: src/*: Make PCI ID macro names shorter

[Felix Singer (Code Review)]

Attention is currently required from: Raul Rangel, Patrick Rudolph, Mariusz Szafrański, Jonathan Zhang, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Tim Wawrzynczak, Christian Walter, Suresh Bellampalli, Michal Motyl, Tim Chu.
Hello build bot (Jenkins), Raul Rangel, Patrick Rudolph, Mariusz Szafrański, Jonathan Zhang, Arthur Heymans, Andrey Petrov, Patrick Rudolph, Anjaneya "Reddy" Chagam, Nico Huber, David Guckian, Johnny Lin, Christian Walter, Suresh Bellampalli, Michal Motyl, Alexander Couzens, Werner Zeh, Tim Chu, Felix Held, Angel Pons, Michael Niewöhner, Jason Glenesk, Damien Zammit, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, David Guckian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39331

to look at the new patch set (#7).

Change subject: src/*: Make PCI ID macro names shorter
......................................................................

src/*: Make PCI ID macro names shorter

This patch shortens macro names containing PCI_{DEVICE,VENDOR}_ID_
with PCI_{DID,VID}_.

Used commands:
find -type f -exec sed -i 's/PCI_DEVICE_ID_/PCI_DID_/g' {} +
find -type f -exec sed -i 's/PCI_VENDOR_ID_/PCI_VID_/g' {} +

Change-Id: If9027700f53b6d0d3964c26a41a1f9b8f62be178
Signed-off-by: Felix Singer 
---
M src/device/pci_rom.c
M src/drivers/aspeed/ast2050/ast2050.c
M src/drivers/broadcom/bcm57xx_aspm_disable.c
M src/drivers/generic/bayhub/bh720.c
M src/drivers/generic/bayhub_lv2/lv2.c
M src/drivers/genesyslogic/gl9755/gl9755.c
M src/drivers/genesyslogic/gl9763e/gl9763e.c
M src/drivers/intel/gma/opregion.c
M src/drivers/intel/i210/i210.c
M src/drivers/intel/ish/ish.c
M src/drivers/ricoh/rce822/rce822.c
M src/drivers/siemens/nc_fpga/nc_fpga.c
M src/drivers/siemens/nc_fpga/nc_fpga_early.c
M src/drivers/usb/pci_xhci/pci_xhci.c
M src/drivers/wifi/generic/acpi.c
M src/drivers/wifi/generic/generic.c
M src/drivers/wifi/generic/smbios.c
M src/include/device/pci_ids.h
M src/mainboard/google/brya/variants/brya0/ramstage.c
M src/mainboard/google/hatch/variants/baseboard/mainboard.c
M src/mainboard/google/poppy/variants/atlas/mainboard.c
M src/mainboard/google/poppy/variants/nocturne/mainboard.c
M src/mainboard/intel/adlrvp/ramstage.c
M src/mainboard/lenovo/x60/mainboard.c
M src/mainboard/prodrive/hermes/devicetree.cb
M src/mainboard/siemens/mc_apl1/mainboard.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c
M src/mainboard/siemens/mc_ehl/mainboard.c
M src/northbridge/amd/agesa/family14/northbridge.c
M src/northbridge/amd/agesa/family15tn/iommu.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/pi/00730F01/iommu.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/gm45/gma.c
M src/northbridge/intel/haswell/gma.c
M src/northbridge/intel/haswell/minihd.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/haswell/pcie.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i945/gma.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/ironlake/gma.c
M src/northbridge/intel/ironlake/northbridge.c
M src/northbridge/intel/pineview/gma.c
M src/northbridge/intel/sandybridge/gma.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/sandybridge/pcie.c
M src/northbridge/intel/x4x/gma.c
M src/soc/amd/cezanne/data_fabric.c
M src/soc/amd/cezanne/root_complex.c
M src/soc/amd/common/block/acp/acp.c
M src/soc/amd/common/block/graphics/graphics.c
M src/soc/amd/common/block/hda/hda.c
M src/soc/amd/common/block/iommu/iommu.c
M src/soc/amd/common/block/lpc/lpc.c
M src/soc/amd/common/block/pci/pcie_gpp.c
M src/soc/amd/common/block/sata/sata.c
M src/soc/amd/common/block/smbus/sm.c
M src/soc/amd/picasso/data_fabric.c
M src/soc/amd/picasso/root_complex.c
M src/soc/amd/stoneyridge/include/soc/pci_devs.h
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/usb.c
M src/soc/cavium/common/pci/uart.c
M src/soc/intel/alderlake/bootblock/report_platform.c
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/cpu.c
M src/soc/intel/alderlake/fsp_params.c
M src/soc/intel/alderlake/vr_config.c
M src/soc/intel/apollolake/report_platform.c
M src/soc/intel/baytrail/ehci.c
M src/soc/intel/baytrail/emmc.c
M src/soc/intel/baytrail/gfx.c
M src/soc/intel/baytrail/hda.c
M src/soc/intel/baytrail/lpe.c
M src/soc/intel/baytrail/lpss.c
M src/soc/intel/baytrail/northcluster.c
M src/soc/intel/baytrail/pcie.c
M src/soc/intel/baytrail/sata.c
M src/soc/intel/baytrail/sd.c
M src/soc/intel/baytrail/southcluster.c
M src/soc/intel/baytrail/xhci.c
M src/soc/intel/braswell/emmc.c
M src/soc/intel/braswell/gfx.c
M src/soc/intel/braswell/lpe.c
M src/soc/intel/braswell/lpss.c
M src/soc/intel/braswell/northcluster.c
M src/soc/intel/braswell/pcie.c
M src/soc/intel/braswell/sata.c
M src/soc/intel/braswell/sd.c
M src/soc/intel/braswell/southcluster.c
M src/soc/intel/braswell/xhci.c
M src/soc/intel/broadwell/gma.c
M src/soc/intel/broadwell/minihd.c
M src/soc/intel/broadwell/northbridge.c
M src/soc/intel/broadwell/pch/adsp.c
M src/soc/intel/broadwell/pch/hda.c
M src/soc/intel/broadwell/pch/lpc.c
M src/soc/intel/broadwell/pch/me.c
M src/soc/intel/broadwell/pch/pcie.c
M src/soc/intel/broadwell/pch/sata.c
M src/soc/intel/broadwell/pch/serialio.c
M src/soc/intel/broadwell/pch/usb_ehci.c
M src/soc/intel/broadwell/pch/usb_xhci.c
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/cannonlake/vr_config.c
M src/soc/intel/common/block/cnvi/cnvi.c
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/dsp/dsp.c
M src/soc/intel/common/block/dtt/dtt.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/hda/hda.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/ipu/ipu.c
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/pcie/pcie.c
M src/soc/intel/common/block/pmc/pmc.c
M src/soc/intel/common/block/sata/sata.c
M src/soc/intel/common/block/scs/mmc.c
M src/soc/intel/common/block/scs/sd.c
M src/soc/intel/common/block/smbus/smbus.c
M src/soc/intel/common/block/spi/spi.c
M src/soc/intel/common/block/sram/sram.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/uart/uart.c
M src/soc/intel/common/block/usb4/usb4.c
M src/soc/intel/common/block/usb4/xhci.c
M src/soc/intel/common/block/xdci/xdci.c
M src/soc/intel/common/block/xhci/xhci.c
M src/soc/intel/denverton_ns/csme_ie_kt.c
M src/soc/intel/denverton_ns/lpc.c
M src/soc/intel/denverton_ns/npk.c
M src/soc/intel/denverton_ns/pmc.c
M src/soc/intel/denverton_ns/sata.c
M src/soc/intel/denverton_ns/systemagent.c
M src/soc/intel/denverton_ns/uart.c
M src/soc/intel/denverton_ns/xhci.c
M src/soc/intel/elkhartlake/bootblock/report_platform.c
M src/soc/intel/icelake/bootblock/report_platform.c
M src/soc/intel/jasperlake/bootblock/report_platform.c
M src/soc/intel/quark/ehci.c
M src/soc/intel/quark/gpio_i2c.c
M src/soc/intel/quark/lpc.c
M src/soc/intel/quark/northcluster.c
M src/soc/intel/quark/sd.c
M src/soc/intel/quark/spi.c
M src/soc/intel/quark/uart.c
M src/soc/intel/skylake/bootblock/report_platform.c
M src/soc/intel/skylake/graphics.c
M src/soc/intel/skylake/vr_config.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
M src/soc/intel/tigerlake/lpm.c
M src/soc/intel/tigerlake/systemagent.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/uncore.c
M src/southbridge/amd/agesa/hudson/hda.c
M src/southbridge/amd/agesa/hudson/hudson.c
M src/southbridge/amd/agesa/hudson/ide.c
M src/southbridge/amd/agesa/hudson/lpc.c
M src/southbridge/amd/agesa/hudson/pci.c
M src/southbridge/amd/agesa/hudson/pcie.c
M src/southbridge/amd/agesa/hudson/sata.c
M src/southbridge/amd/agesa/hudson/sd.c
M src/southbridge/amd/agesa/hudson/sm.c
M src/southbridge/amd/agesa/hudson/usb.c
M src/southbridge/amd/cimx/sb800/late.c
M src/southbridge/amd/pi/hudson/hda.c
M src/southbridge/amd/pi/hudson/hudson.c
M src/southbridge/amd/pi/hudson/ide.c
M src/southbridge/amd/pi/hudson/lpc.c
M src/southbridge/amd/pi/hudson/pci.c
M src/southbridge/amd/pi/hudson/pcie.c
M src/southbridge/amd/pi/hudson/sata.c
M src/southbridge/amd/pi/hudson/sd.c
M src/southbridge/amd/pi/hudson/sm.c
M src/southbridge/amd/pi/hudson/usb.c
M src/southbridge/intel/bd82x6x/azalia.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/bd82x6x/me.c
M src/southbridge/intel/bd82x6x/me_8.x.c
M src/southbridge/intel/bd82x6x/pci.c
M src/southbridge/intel/bd82x6x/pcie.c
M src/southbridge/intel/bd82x6x/sata.c
M src/southbridge/intel/bd82x6x/smbus.c
M src/southbridge/intel/bd82x6x/usb_ehci.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
M src/southbridge/intel/common/early_smbus.c
M src/southbridge/intel/i82371eb/bootblock.c
M src/southbridge/intel/i82371eb/early_pm.c
M src/southbridge/intel/i82371eb/early_smbus.c
M src/southbridge/intel/i82371eb/ide.c
M src/southbridge/intel/i82371eb/isa.c
M src/southbridge/intel/i82371eb/smbus.c
M src/southbridge/intel/i82371eb/usb.c
M src/southbridge/intel/i82801dx/ac97.c
M src/southbridge/intel/i82801dx/ide.c
M src/southbridge/intel/i82801dx/lpc.c
M src/southbridge/intel/i82801dx/pci.c
M src/southbridge/intel/i82801dx/usb.c
M src/southbridge/intel/i82801dx/usb2.c
M src/southbridge/intel/i82801gx/ac97.c
M src/southbridge/intel/i82801gx/azalia.c
M src/southbridge/intel/i82801gx/ide.c
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801gx/pci.c
M src/southbridge/intel/i82801gx/pcie.c
M src/southbridge/intel/i82801gx/sata.c
M src/southbridge/intel/i82801gx/smbus.c
M src/southbridge/intel/i82801gx/usb.c
M src/southbridge/intel/i82801gx/usb_ehci.c
M src/southbridge/intel/i82801ix/azalia.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801ix/pci.c
M src/southbridge/intel/i82801ix/pcie.c
M src/southbridge/intel/i82801ix/sata.c
M src/southbridge/intel/i82801ix/smbus.c
M src/southbridge/intel/i82801ix/thermal.c
M src/southbridge/intel/i82801ix/usb_ehci.c
M src/southbridge/intel/i82801jx/azalia.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/i82801jx/pci.c
M src/southbridge/intel/i82801jx/pcie.c
M src/southbridge/intel/i82801jx/sata.c
M src/southbridge/intel/i82801jx/smbus.c
M src/southbridge/intel/i82801jx/thermal.c
M src/southbridge/intel/i82801jx/usb_ehci.c
M src/southbridge/intel/i82870/ioapic.c
M src/southbridge/intel/i82870/pcibridge.c
M src/southbridge/intel/ibexpeak/azalia.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/ibexpeak/me.c
M src/southbridge/intel/ibexpeak/sata.c
M src/southbridge/intel/ibexpeak/smbus.c
M src/southbridge/intel/ibexpeak/thermal.c
M src/southbridge/intel/ibexpeak/usb_ehci.c
M src/southbridge/intel/lynxpoint/azalia.c
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/me.c
M src/southbridge/intel/lynxpoint/pcie.c
M src/southbridge/intel/lynxpoint/sata.c
M src/southbridge/intel/lynxpoint/serialio.c
M src/southbridge/intel/lynxpoint/smbus.c
M src/southbridge/intel/lynxpoint/usb_ehci.c
M src/southbridge/intel/lynxpoint/usb_xhci.c
M src/southbridge/ricoh/rl5c476/rl5c476.c
M src/southbridge/ti/pci1x2x/pci1x2x.c
M src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Pci22.h
M src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Pci22.h
254 files changed, 6,446 insertions(+), 6,446 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/39331/7