Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu.
Hello Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/81047?usp=email
to review the following change.
Change subject: soc/intel/xeon_sp: Add domain_to_pcie_segment_group ......................................................................
soc/intel/xeon_sp: Add domain_to_pcie_segment_group
Change-Id: Ie9626c125a2ea07fab7be2b2dbe922a3574dc3bf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Signed-off-by: Shuo Liu shuo.liu@intel.com --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h 2 files changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/81047/1
diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c index f89532d..73978c9 100644 --- a/src/soc/intel/xeon_sp/chip_common.c +++ b/src/soc/intel/xeon_sp/chip_common.c @@ -316,3 +316,13 @@ return false; }
+int domain_to_pcie_segment_group(const struct device *dev) +{ + assert(dev->path.type == DEVICE_PATH_DOMAIN); + const union xeon_domain_path dn = { + .domain_path = dev->path.domain.domain + }; + const IIO_UDS *hob = get_iio_uds(); + assert(hob != NULL); + return hob->PlatformData.CpuQpiInfo[dn.socket].PcieSegment; +} diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index 683df03..33980a7 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -44,4 +44,6 @@ bool is_dev_on_ioat_domain(struct device *dev); bool is_dev_on_ubox_domain(struct device *dev);
+int domain_to_pcie_segment_group(const struct device *dev); + #endif /* _CHIP_COMMON_H_ */