[coreboot-gerrit] Change in coreboot[master]: WIP: Add configurable ramstage support for minimal PCI scanning

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )

Change subject: WIP: Add configurable ramstage support for minimal PCI scanning
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Patch Set 14:
> Patch Set 14:
> > Patch Set 14:
> > That is the approach I would want vendor to really put the effort into. But it turns out to be more work than I plan to volunteer for at least. For the review of this commit I am mostly in "damage management mode" to overlook that an unnecessary complex bandage does not land.
>
> Kyosti, how does the damage look at present. I'm working on one more approach to try to bring in Nico's idea but not done yet.

It's much less intrusive than before :). Specially if we take into account that there would be few cases where you need to explicitly opt-out.

However, looking at some logged times created from CB:36574 and CB:36584, I am a bit concerned that majority of advertised performance boost of partial enumeration / allocation would be due to console. Still waiting for Intel to provide us with some data.