[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/pcie.c: Add missing pre-ASPM init

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Paul Menzel, Arthur Heymans.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47223 )

Change subject: nb/intel/haswell/pcie.c: Add missing pre-ASPM init
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Patch Set 5:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/47223/comment/e1ecbea0_19ac7ecd 
PS5, Line 9: expected
> How do you know, what values are expected?

Documentation and/or reference code lists the configuration steps that "BIOS" needs to do. After implementing these steps in coreboot, I expect that the registers contain the values I've programmed them to.

I'll update the commit message.