[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch/variants/mushu: modify PCIe ports setting

[Shelley Chen (Code Review)]

Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38399 )

Change subject: mb/google/hatch/variants/mushu: modify PCIe ports setting
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Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38399/5/src/mainboard/google/hatch/... 
File src/mainboard/google/hatch/variants/mushu/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/38399/5/src/mainboard/google/hatch/... 
PS5, Line 74: 
            : 	# PCIe port 3 reserve for GPU REFCLK
            : 	register "PcieRpEnable[2]" = "1"
            : 	register "PcieRpLtrEnable[2]" = "1"
            : 	# RP 3 uses CLK SRC 2
            : 	register "PcieClkSrcUsage[2]" = "2"
            : 	register "PcieClkSrcClkReq[2]" = "2"
Sorry, updating the last comment.  Is PCIe port 3 being used for testing at the moment?  if that's the case, then can we not commit the changes for now?  This is not consistent with the current schematics.

BTW, you'll have to update the corresponding PCI configs with the fit tool as well.