[coreboot-gerrit] Patch set updated for coreboot: arch/riscv: Delegate exceptions to supervisor mode if appropriate

[Jonathan Neuschäfer]

Jonathan Neuschäfer ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16160

-gerrit

commit bf3ffa52906d612d2ae7c1c8a33d282938b312ab
Author: Jonathan Neuschäfer 
Date:   Fri Aug 19 12:10:19 2016 +0200

arch/riscv: Delegate exceptions to supervisor mode if appropriate

Change-Id: I1c8127412af0f9acc5b5520dc324ac145e59a4bd
    Signed-off-by: Jonathan Neuschäfer 
---
 src/arch/riscv/virtual_memory.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index f48c413..fa30c54 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -208,4 +208,14 @@ void mstatus_init(void)

clear_csr(mip, MIP_MSIP);
    set_csr(mie, MIP_MSIP);
+
+	/* Configure which exception causes are delegated to supervisor mode */
+	set_csr(medeleg,  (1 << CAUSE_MISALIGNED_FETCH)
+			| (1 << CAUSE_FAULT_FETCH)
+			| (1 << CAUSE_ILLEGAL_INSTRUCTION)
+			| (1 << CAUSE_BREAKPOINT)
+			| (1 << CAUSE_FAULT_LOAD)
+			| (1 << CAUSE_FAULT_STORE)
+			| (1 << CAUSE_USER_ECALL)
+	);
 }