Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38461 )
Change subject: soc/intel/tigerlake: Update FSP params for Jasper Lake ......................................................................
Patch Set 25:
(3 comments)
https://review.coreboot.org/c/coreboot/+/38461/24/src/soc/intel/tigerlake/ch... File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/38461/24/src/soc/intel/tigerlake/ch... PS24, Line 208: enum {
Agree. Done.
Done
https://review.coreboot.org/c/coreboot/+/38461/24/src/soc/intel/tigerlake/fs... File src/soc/intel/tigerlake/fsp_params_jsl.c:
https://review.coreboot.org/c/coreboot/+/38461/24/src/soc/intel/tigerlake/fs... PS24, Line 114: 1
want to explicitly set it for S3 flow.
Done
https://review.coreboot.org/c/coreboot/+/38461/23/src/soc/intel/tigerlake/in... File src/soc/intel/tigerlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/38461/23/src/soc/intel/tigerlake/in... PS23, Line 90: XHCI
because of PCH_DEV_SLOT_XHCI 0x14 […]
Ack