[coreboot-gerrit] [M] Change in coreboot[main]: soc/intel: Add Wildcat Lake CPU and PCIE device IDs

[Avi Uday (Code Review)]

Attention is currently required from: Appukuttan V K, Intel coreboot Reviewers, Nick Vaccaro, Sowmya Aralguppe, Usha P, Varun Upadhyay.

Avi Uday has posted comments on this change by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/87262?usp=email )

Change subject: soc/intel: Add Wildcat Lake CPU and PCIE device IDs
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Patch Set 10:

(2 comments)

File src/include/device/pci_ids.h:

https://review.coreboot.org/c/coreboot/+/87262/comment/c0e687ab_48207195?usp... :
PS10, Line 4830: #define PCI_DID_INTEL_WCL_XDCI		0x4d7e
This has not been added to pci_device_ids of src/third_party/coreboot/src/soc/intel/common/block/xdci/xdci.c
Is this intentional?

https://review.coreboot.org/c/coreboot/+/87262/comment/880c46c1_af83366b?usp... :
PS10, Line 5009: #define PCI_DID_INTEL_WCL_CNVI_BT		0x4d76
This has not been added in pci_device_ids of src/third_party/coreboot/src/soc/intel/common/block/cnvi/cnvi.c
is this intentional too?