[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Halt if workbuf is absent after psp_verstage

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42810 )

Change subject: soc/amd/picasso: Halt if workbuf is absent after psp_verstage
......................................................................

soc/amd/picasso: Halt if workbuf is absent after psp_verstage

Check for the workbuf in bootblock if psp_verstage is being used.

BUG=b:158124527
TEST=Build & boot Trembyle with psp_verstage

Signed-off-by: Martin Roth 
Change-Id: I0ec8d2c953bce4c44cde5102d2765e0ab9b5875e
---
M src/soc/amd/picasso/bootblock/bootblock.c
1 file changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/42810/1

diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c
index a3935cc..f633767 100644
--- a/src/soc/amd/picasso/bootblock/bootblock.c
+++ b/src/soc/amd/picasso/bootblock/bootblock.c
@@ -14,6 +14,11 @@
 #include <amdblocks/amd_pci_mmconf.h>
 #include <acpi/acpi.h>

+/* vboot includes directory may bot be in include path if vboot is not enabled */
+#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
+#include <2struct.h>
+#endif
+
 asmlinkage void bootblock_resume_entry(void);

/* PSP performs the memory training and setting up DRAM map prior to x86 cores
@@ -123,5 +128,17 @@
    u32 val = cpuid_eax(1);
    printk(BIOS_DEBUG, "Family_Model: %08x\n", val);

+#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
+#include <2struct.h>
+	unsigned int *workbuf_location = (unsigned int *)CONFIG_PSP_SHAREDMEM_BASE;
+	if (*workbuf_location != VB2_SHARED_DATA_MAGIC) {
+		printk(BIOS_ERR,"ERROR: VBOOT workbuf not valid.\n");
+
+		printk(BIOS_DEBUG,"Signature: %#08x\n",*workbuf_location);
+
+		die("Halting.\n");
+	}
+#endif
+
    fch_early_init();
 }