Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31503 )
Change subject: drivers/intel/gma: Add `new-pch.asl` for Skylake+ ......................................................................
Patch Set 1:
(1 comment)
This change looks to require CSTE (Current Display State), NSTE (Next Display State) and DSEN (Display Output Switching Enable) added to globalnvs and the SMI trap added back to platform (https://github.com/coreboot/coreboot/commit/2e37fdddd5f859b82923485612ec8693...)
Hmmm, maybe we should fix the common code first. a) The GNVS variables are never referenced anywhere else, hence could be local variables in `gma/acpi/common.asl`. b) The TRAP only makes sense if there is an SMI handler to handle it. Maybe we should identify the platforms that do that and disable the call on the others.
https://review.coreboot.org/c/coreboot/+/31503/1/src/drivers/intel/gma/acpi/... File src/drivers/intel/gma/acpi/new-pch.asl:
PS1:
Are you referring to CB:32529 and CB:32549?
The former probably. I've seen earlier patches too,not sure if anything was merged.