Hello Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Nico Huber, Damien Zammit,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35521
to look at the new patch set (#2).
Change subject: intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL ......................................................................
intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL
This is a PCI standard register, no need to alias its definitions under different names.
Change-Id: Iea6b198dd70fe1e49b5dc0824dba62628dedc69a Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/kontron/986lcd-m/romstage.c M src/mainboard/roda/rk886ex/romstage.c M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/i945/early_init.c M src/northbridge/intel/i945/i945.h M src/northbridge/intel/nehalem/nehalem.h M src/northbridge/intel/pineview/pineview.h M src/northbridge/intel/sandybridge/sandybridge.h M src/soc/intel/broadwell/pcie.c M src/soc/intel/common/block/pcie/pcie.c M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/bd82x6x/pci.c M src/southbridge/intel/bd82x6x/pcie.c M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801gx/pci.c M src/southbridge/intel/i82801gx/pcie.c M src/southbridge/intel/i82801ix/pcie.c M src/southbridge/intel/i82801jx/pcie.c M src/southbridge/intel/ibexpeak/pch.h M src/southbridge/intel/lynxpoint/pch.h M src/southbridge/intel/lynxpoint/pcie.c 21 files changed, 65 insertions(+), 91 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/35521/2