Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44077 )
Change subject: drivers/intel/fsp2_0: Do AP re-init after FSP-S if USE_INTEL_FSP_MP_INIT enable ......................................................................
drivers/intel/fsp2_0: Do AP re-init after FSP-S if USE_INTEL_FSP_MP_INIT enable
This patch ensures to take control of APs back by doing the full AP re-initialization after FSP-S is done and control has been transferred back to coreboot.
TEST=Able to see all cores available after booting to OS using below command when coreboot is built with CONFIG_USE_INTEL_FSP_MP_INIT enable.
cat /proc/cpuinfo
Without this CL :
shows only 1 core (only BSP)
With this CL :
shows all possible cores available (BSP + APs)
Change-Id: I247d8d1166c77bd01922323b6a0f14ec6640a666 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/drivers/intel/fsp2_0/silicon_init.c 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/44077/1
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 663b1d7..7b77590 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -7,6 +7,7 @@ #include <console/console.h> #include <fsp/api.h> #include <fsp/util.h> +#include <intelblocks/mp_init.h> #include <program_loading.h> #include <soc/intel/common/vbt.h> #include <stage_cache.h> @@ -127,6 +128,14 @@ fsp_debug_after_silicon_init(status); fsps_return_value_handler(FSP_SILICON_INIT_API, status);
+ /* + * As per FSP integration guide: + * If bootloader needs to take control of APs back the full AP re-initialization + * required after FSP-S completed and control has been transferred back to bootloader + */ + if (CONFIG(USE_INTEL_FSP_MP_INIT)) + init_cpus(); + if (!CONFIG(PLATFORM_USES_FSP2_2)) return;