[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso/bootblock: Clear BSS section

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42475 )

Change subject: soc/amd/picasso/bootblock: Clear BSS section
......................................................................

soc/amd/picasso/bootblock: Clear BSS section

We are currently relying on the assumption that the amdcompress tool
will zero out the bss section. Instead of relying on this assumption,
lets explicitly clear it.

The implementation was copied from assembly_entry.S.

BUG=b:147042464
TEST=Cold boot trembyle and also s3 resume trembyle

Signed-off-by: Raul E Rangel 
Change-Id: Ifb4f4cc6932dd4c3c92d4e7647569f9a0c69ea4c
---
M src/soc/amd/picasso/bootblock/pre_c.S
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/42475/1

diff --git a/src/soc/amd/picasso/bootblock/pre_c.S b/src/soc/amd/picasso/bootblock/pre_c.S
index 83e5491..6fae1ed 100644
--- a/src/soc/amd/picasso/bootblock/pre_c.S
+++ b/src/soc/amd/picasso/bootblock/pre_c.S
@@ -23,6 +23,15 @@
 bootblock_pre_c_entry:
    post_code(0xa0)

+	/* Clear .bss section */
+	cld
+	xor	%eax, %eax
+	movl	$(_ebss), %ecx
+	movl	$(_bss), %edi
+	sub	%edi, %ecx
+	shrl	$2, %ecx
+	rep	stosl
+
    movl	$_eearlyram_stack, %esp

/* Align the stack and keep aligned for call to bootblock_c_entry() */