[coreboot-gerrit] Change in coreboot[master]: soc/intel: Add Intel SkyLake Scalable Processor support

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38548 )

Change subject: soc/intel: Add Intel SkyLake Scalable Processor support
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Patch Set 16:

(2 comments)

https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/K... 
File src/soc/intel/skylake_sp/Kconfig:

https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/K... 
PS15, Line 154: 	  Do not change this value
> Good point. […]

Ack

https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/a... 
File src/soc/intel/skylake_sp/acpi/uncore_irq.asl:

https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/a... 
PS15, Line 50: 		Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
> This is correct. [DMI0]: Legacy PCI Express Port 0 on PC00. […]

Ack.

Since the rest of the entries are aligned, I would suggest adding four spaces after the comma to align this one as well.