[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/phoenix/Makefile: conditionally add fsp_[m,s]_params.c

[Felix Held (Code Review)]

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier.

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79984?usp=email )

Change subject: soc/amd/phoenix/Makefile: conditionally add fsp_[m,s]_params.c
......................................................................

soc/amd/phoenix/Makefile: conditionally add fsp_[m,s]_params.c

fsp_m_params.c and fsp_s_params.c only contain FSP-specific code, so
only add those to the build if the SOC_AMD_PHOENIX_FSP Kconfig option is
selected. Other files have FSP-specific parts too, but those will be
reworked in in future patches.

Signed-off-by: Felix Held 
Change-Id: Ife38ca6a548d7c3c2e765d9c9f30e0a4057bb373
---
M src/soc/amd/phoenix/Makefile.inc
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/79984/1

diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc
index 03a38ad..0301cdc 100644
--- a/src/soc/amd/phoenix/Makefile.inc
+++ b/src/soc/amd/phoenix/Makefile.inc
@@ -21,7 +21,7 @@

verstage-y	+= espi_util.c

-romstage-y	+= fsp_m_params.c
+romstage-$(CONFIG_SOC_AMD_PHOENIX_FSP) += fsp_m_params.c
 romstage-y	+= romstage.c
 romstage-y	+= soc_util.c

@@ -30,7 +30,7 @@
 ramstage-y	+= chip.c
 ramstage-y	+= cpu.c
 ramstage-y	+= fch.c
-ramstage-y	+= fsp_s_params.c
+ramstage-$(CONFIG_SOC_AMD_PHOENIX_FSP) += fsp_s_params.c
 ramstage-y	+= graphics.c
 ramstage-y	+= mca.c
 ramstage-y	+= root_complex.c