Aaron Durbin (adurbin@chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16201
-gerrit
commit fb630ee52405ade13dc308f8597c6e5075a9025f Author: Aaron Durbin adurbin@chromium.org Date: Thu Aug 11 23:51:42 2016 -0500
soc/intel/apollolake: use SPI flash boot_device_rw() for ealy stages
If the boot device is SPI flash use the common one in the early stages. While tweaking the config don't auto select SPI_FLASH as that is handled automatically by the rest of the build system.
BUG=chrome-os-partner:56151
Change-Id: If5e3d06008d5529dd6d7c05d374a81ba172d58fd Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/soc/intel/apollolake/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 0c7f27a..db4559c 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -12,6 +12,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 + select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE @@ -49,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_LPSS_I2C select SOC_INTEL_COMMON_SMI - select SPI_FLASH select UDELAY_TSC select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER