Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45680 )
Change subject: soc/intel/icelake: Refer GPIO state macros from intelblocks/gpio_defs.h ......................................................................
soc/intel/icelake: Refer GPIO state macros from intelblocks/gpio_defs.h
TEST=Able to build and boot ICLRVP platform. 1) Dump and disassemble DSDT, verify unified methods like GRXS is there. 2) Verify no ACPI error seen while running 'dmesg` from console.
Change-Id: Iab4690341bc3da5d8eb249da4d407d84f7d4e706 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/icelake/acpi/gpio.asl M src/soc/intel/icelake/include/soc/gpio_defs.h 2 files changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/45680/1
diff --git a/src/soc/intel/icelake/acpi/gpio.asl b/src/soc/intel/icelake/acpi/gpio.asl index f0a6fa0..823f9cc 100644 --- a/src/soc/intel/icelake/acpi/gpio.asl +++ b/src/soc/intel/icelake/acpi/gpio.asl @@ -1,4 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <intelblocks/gpio_defs.h> #include <soc/gpio_defs.h> #include <soc/irq.h> #include <soc/pcr_ids.h> @@ -114,7 +115,7 @@ { VAL0, 32 } - Local0 = GPIORXSTATE_MASK & (VAL0 >> GPIORXSTATE_SHIFT) + Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
Return (Local0) } diff --git a/src/soc/intel/icelake/include/soc/gpio_defs.h b/src/soc/intel/icelake/include/soc/gpio_defs.h index 57701e1..577ca5f 100644 --- a/src/soc/intel/icelake/include/soc/gpio_defs.h +++ b/src/soc/intel/icelake/include/soc/gpio_defs.h @@ -257,6 +257,4 @@ #define GPI_SMI_EN_0 0x1A0 #define PAD_CFG_BASE 0x600
-#define GPIORXSTATE_MASK 0x1 -#define GPIORXSTATE_SHIFT 1 #endif