[coreboot-gerrit] Change in coreboot[master]: soc/intel/*: Add TPM decode range to soc_get_fixed_mmio_ranges()

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48658 )

Change subject: soc/intel/*: Add TPM decode range to soc_get_fixed_mmio_ranges()
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48658/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48658/1//COMMIT_MSG@13 
PS1, Line 13: 8 KiB
> Done

Where do you see those values? In the TCG PTP and TIS specifications, I see 0x5000 defined, 0x1000 for each locality. The PTP specification reserves an additional 0x1000 as "non-locality specific registers."