[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/apollolake: LZ4 Compress FSP-M

[Paul Fagerburg (Code Review)]

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48158 )

Change subject: soc/intel/apollolake: LZ4 Compress FSP-M
......................................................................

soc/intel/apollolake: LZ4 Compress FSP-M

FSP-M is not run XIP so it can be compressed. This more than halves
the binary size. 364544 bytes -> 168616 bytes.

On the up/squared this also results in a 83ms speedup.

TESTED: up/squared boots.

Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48158
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Sean Rhodes 
---
M src/soc/intel/apollolake/Kconfig
1 file changed, 22 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, but someone else must approve
  Sean Rhodes: Looks good to me, approved

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index c63f4fd..36bc631 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -56,6 +56,7 @@
    select NO_PM_ACPI_TIMER
    select NO_UART_ON_SUPERIO
    select NO_XIP_EARLY_STAGES
+	select FSP_COMPRESS_FSP_M_LZ4
    select PARALLEL_MP_AP_WORK
    select PCIEXP_ASPM
    select PCIEXP_COMMON_CLOCK