[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33941 )

Change subject: soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H
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Patch Set 5: Code-Review+2

(2 comments)

Thanks

https://review.coreboot.org/#/c/33941/5//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/33941/5//COMMIT_MSG@9 
PS5, Line 9: Soem
Some

https://review.coreboot.org/#/c/33941/5/src/soc/intel/cannonlake/include/soc... 
File src/soc/intel/cannonlake/include/soc/pmc.h:

https://review.coreboot.org/#/c/33941/5/src/soc/intel/cannonlake/include/soc... 
PS5, Line 119: #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)
I would really appreciate a comment here above the numbers
that the datasheet is wrong.