Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )
Change subject: WIP: Add configurable ramstage support for minimal PCI scanning ......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36221/13/src/device/pci_device.c File src/device/pci_device.c:
https://review.coreboot.org/c/coreboot/+/36221/13/src/device/pci_device.c@44... PS13, Line 446: pci_bus_read_resources_always(dev);
I think in this case I like Nico's idea, where we only mark certain boards as supporting minimal sca […]
Let's try to avoid the use of obscure term 'scanning'.
The part I like about #13 is that it does complete PCI enumeration (probes device ID and attempts to bind that with built-in drivers). This avoids the complications of altering ACPI namespace. I did found some other places where PCI device bus numbers are injected to some tables that are forwarded to OS. Like before, I consider partial PCI enumeration harmful. Like Nico, I would replace _SCANNING in the KConfig name.
You will get my support for "restricted PCI resources allocation", the details how to accomplish this shall be polished. The semantics of .read_resources become a bit complicated if you leave PCI bridge windows unassigned, I think it is too strict a requirement to not be able to opt-in PCI devices that are situated behind PCIe bridges.
I am mostly ignoring the "boot-time" arguments for both restricted PCI enumeration and resource allocation for the time being. Performance numbers have not been produced for review and I suspect these PCI bridge window resource probes to be very lightweight.