Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61896
to look at the new patch set (#3).
Change subject: soc/amd/cezanne/fw.cfg: provide default SPL table binary ......................................................................
soc/amd/cezanne/fw.cfg: provide default SPL table binary
Chause doesn't get to x86 bootblock without the SPL table binary in the PSP directory table, so I assume that Majolica won't get to x86 bootblock either, since the Cezanne SoC default is not to include any SPL table binary. This was caused by a combination of commit 6c5ec8e31ccbe3d9bbf201c956fc3b54703a9767 (amdfwtool: Add options to support mainboard specific SPL table) that caused a regression in amdfwtool and commit c5b912f788765560c1db08f3341826b9c548b865 (soc/amd/cezanne: Allow to specify SPL table path in Kconfig) that removed the default for the Cezanne SoC. Fix this by adding the default SPL table file back to the fw.cfg file which will get ignored by amdfwtool when a mainboard selects SPL_TABLE_FILE and specifies another SPL table binary.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ica960e5422da50899a2d9c192863188174e0bcff --- M src/soc/amd/cezanne/fw.cfg 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/61896/3