[coreboot-gerrit] Change in coreboot[master]: soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/c...

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36463 )

Change subject: soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi
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Patch Set 9:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36463/9/src/soc/intel/apollolake/ac... 
File src/soc/intel/apollolake/acpi/sleepstates.asl:

PS9:
> APL didn't have ACPI S4 here, does it work now?

just adding in .asl code might not make it work. this might be maximum capabilities that bios can list but finally its OS which decide what all sleep state to support.

So no issue observed in APL device

https://review.coreboot.org/c/coreboot/+/36463/9/src/southbridge/intel/fsp_r... 
File src/southbridge/intel/fsp_rangeley/acpi/sleepstates.asl:

PS9:
> Rangeley says it does not support S1 nor S3 sleep states, has it been addressed? […]

i have mentioned in APL comment

just adding in .asl code might not make it work. this might be maximum capabilities that bios can list but finally its OS which decide what all sleep state to support.

We are also testing on Rangley will wait for complete test results before merging