[coreboot-gerrit] Change in ...coreboot[master]: {drivers,mb,soc/intel/braswell}: Add support for Braswell FSP MR2

[Frans Hendriks (Code Review)]

Hello Patrick Rudolph, Aaron Durbin, Nathaniel L Desimone, David Guckian, Subrata Banik, Matt DeVillier, build bot (Jenkins), Hannah Williams, Martin Roth, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/29661

to look at the new patch set (#8).

Change subject: {drivers,mb,soc/intel/braswell}: Add support for Braswell FSP MR2
......................................................................

{drivers,mb,soc/intel/braswell}: Add support for Braswell FSP MR2

In soc_silicon_init_params() and soc_display_silicon_init_params()
SILICON_INIT_UPD element are used which do not exist in MR2.
Modify these functions using MR2 elements only.
Configuration of 'pre-MR2' elements is placed in mainboard code to be
backwards compatible.

BUG=NA
TEST=Portwell PQ7-M107

Change-Id: Id40b5d46ddda93845d9739b56aaf7ad24ee89246
Signed-off-by: Frans Hendriks 
---
M src/drivers/intel/fsp1_1/Makefile.inc
M src/mainboard/google/cyan/Makefile.inc
A src/mainboard/google/cyan/ramstage.c
M src/mainboard/intel/strago/ramstage.c
M src/soc/intel/braswell/Makefile.inc
M src/soc/intel/braswell/chip.c
6 files changed, 98 insertions(+), 33 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/29661/8