[coreboot-gerrit] [XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email )

Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
......................................................................

soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API

RTC read/write API requires mt6685 PMIF initialization to prevent
assertion from rtc_get().

BUG=b:382351678
TEST=Build pass, boot successfully, boot log show:
[INFO ]  [mt6685_init_pmif_arb]CHIP ID = 0x85

Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af
Signed-off-by: Jarried Lin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86155
Reviewed-by: Yidi Lin 
Tested-by: build bot (Jenkins) 
Reviewed-by: Yu-Ping Wu 
---
M src/soc/mediatek/mt8196/soc.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Yu-Ping Wu: Looks good to me, approved
  Yidi Lin: Looks good to me, approved

diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c
index 1636f29..8aca958 100644
--- a/src/soc/mediatek/mt8196/soc.c
+++ b/src/soc/mediatek/mt8196/soc.c
@@ -8,6 +8,7 @@
 #include <soc/gpueb.h>
 #include <soc/mcupm.h>
 #include <soc/mmu_operations.h>
+#include <soc/mt6685.h>
 #include <soc/mtk_fsp.h>
 #include <soc/pcie.h>
 #include <soc/sspm.h>
@@ -44,6 +45,7 @@
    sspm_init();
    gpueb_init();
    mcupm_init();
+	mt6685_init_pmif_arb();
 }

static struct device_operations soc_ops = {