[coreboot-gerrit] Change in coreboot[master]: nb/intel/gm45: Use PCI bitwise ops

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph, HAOUAS Elyes,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42189

to look at the new patch set (#5).

Change subject: nb/intel/gm45: Use PCI bitwise ops
......................................................................

nb/intel/gm45: Use PCI bitwise ops

While we are at it, also reflow a few lines that fit in 96 characters.

Tested with BUILD_TIMELESS=1, Roda RK9 does not change.

Change-Id: Icaca44280acdba099a5e13c5fd91d82c3e002bae
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/gm45/early_reset.c
M src/northbridge/intel/gm45/gma.c
M src/northbridge/intel/gm45/igd.c
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/gm45/pcie.c
M src/northbridge/intel/gm45/raminit.c
M src/northbridge/intel/gm45/romstage.c
8 files changed, 74 insertions(+), 140 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/42189/5