Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34810 )
Change subject: soc/intel/common: Set controller state to active in uart init
......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34810/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/34810/4//COMMIT_MSG@16
PS4, Line 16: erify no timeouts seen during UART controller enumeration
: sequence in CML, ICL and APL platforms
:
Also no boot failures or no console issues?
Yes. We have not observed any issues.
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